POWER FAILURE ALARM DRIVER
USING A LONG PERIOD TIMER FOR MUTING
Here is a circuit for the occasion when you want an alarm
that can be muted but not permanently. Perhaps for a power loss alarm
for a critical refrigerator with a DC control unit. The power fails and
the alarm is annoying but switching it off completely could lead to
somebody forgetting about it. Note the inputs are a + DC
voltage with reference to the circuit ground. Most timer circuits are
based on the 555 however for a long period timer the RC values get to
be impractically large. This is solved in the ICM7242 as it counts
128 RC time periods in its one shot mode. The CD4093B is a nand
Schmitt trigger but the normal 4011 nand gate should work as well. The
nand gate has a 15V maximum so to protect it a zener was used to limit
the supply voltage. For better noise immunity the 68K and 10K
resistors in the input circuits could be replaced by 6.8K and 1K if the
signal impedence permitted.
This circuit is still under
development and has not been tested. When it has been I will provide a
PDF of the circuit board.
The circuit above provides a battery operated alarm driver
with the ability to mute the audible warning for a some period
controlled by the components connected to pin 7 of the counter
(approximate 20 minute period shown). The time is calculated from uf
x ohms x 128 in seconds. Thus a 10M would give about 1 hour.
Transistors T1 and T2 isolate the circuit from the input levels and
turn on when their inputs rise above about 4V. The ALARM operates on a
low input which is the expected condition of power fail. The mute input
is selectable for positive or negative operation by the link. As shown
a low on MUTE starts the time counter. Cut the link and connect to the
other side for positive operation. The alarm is muted while the mute
time counter (ICM7242) is running. The mute time counter
is stopped at the end of a time period or on the return (even
if momentarily) of a high on the alarm trigger.
The output pin 3 of the
time counter when not running is high making pin 9 low and holding the
counter reset with a high on its reset pin.
When the alarm Trigger is low nand gate pin 1 goes high and as pin 2 is
high pin 3 is low turning on The BD682. T3 is a darlington and
will source at least 200ma.
A low on MUTE causes a high on the timer trigger (Trigger overrides
reset). The time counter starts and the output goes low holding nand
gate pin 2 low and thus pin 3 high turning off the BD682. When the
counter reaches 128 periods pin 3 rises and the low on pin 9 causes a
high on the reset and the time counter stops and the alarm comes back
on as nand pins 1 and 2 are high.
If the power returns while the time counter is running the low on pin 8
forces a high on pin 10 reseting it. Thus MUTE is only active for the
set period or until the return of power whichever occurs first.
In a real setting particular attention will need to be given to
preventing the MUTE from false triggering. Some RC time delay into the
trigger of the ICM7242 would help. The ICM7242 starts working with a
power supply of only a couple of volts so you should ensure that if it
is powered up on a power fail the trigger imput is held low while the
power rises. This would not be the case in the above circuit if the
MUTE input was pulled up to the circuit positive because T2 would not
conduct until about 4V and the trigger would be active from 2V as the
power came on.