INTRODUCTION


       This manual describes the logical structure and operation of the
English Electric DEUCE Computer. This is a high-speed general-purpose
electronic digital computer.
       The individual circuits and other parts of the DEUCE are described
only in terms of their functions and of the sequence of signals passing
between them. Only indirect and occasional reference is made to the
operation of the electronic circuits as such.
       The reader is assumed to be familiar with the notation of repres-
enting positive and negative binary numbers within the computer. Reference
is made to the section of the DEUCE Programming Manual describing this
notation.
       Modified or additional sections of this manual will be issued from
time to time to keep it up to date with the continuing programme of
improvements to the facilities and operation of the computer.

NS-y-37/11-57

                                 INDEX


CHAPTER                          TITLE                          PAGE


   1                  Brief General Description                   1

   2                  Main Component Parts                       12

   3                  Logical Diagrams                           14

   4                  Fundamental Waveforms                      19

   5                  The Circulation Unit                       23

   6                  Control                                    26

   7                  Destination Triggers                       47

   8                  Logical Operations Unit                    49

   9                  The Adder                                  51

  10                  The Multiplier-Divider Unit                55

  11                  The Magnetic Store                         87

  12                  The Reader and Punch                       98

NS-y-37/11-57

Page 1

BRIEF GENERAL DESCRIPTION

The operation Of the DEUCE will first be described as a whole, with reference to most of its essential parts, before each part is described in detail. In this rapid preliminary survey, a number of difficulties will necessarily be glossed over, it is thought worth while, however, to give the reader as quickly as possible a general framework into which subsequent details can be fitted. REPRESENTATION OF NUMBERS AND INSTRUCTIONS Within the computer a number is represented, in binary form, by a sequence of electric pulses, at intervals of 1 microsec, occupying 32 microsec in all. There are in general less than 32 pulses, since each pulse represents a digit "1" in the number and a digit "0" is denoted by a vacant microsec In which no pulse occurs. The least significant digit always comes first. Thus the number "13"; would be represented in 32 microsec at any point in the Machine by a pulse in the first, third and fourth microsec and the absence of pulses in the second, fifth and subsequent microsec. The significance of the three pulses present is respectively 20 = 1, 22 = 4 and 23 = 8. The same type of signal, consisting of 32 pulses and spaces at 1 microsec intervals, is also used to represent an instruction. This means that the same storage mechanism can be used for either numbers or instructions, and that an instruction can be modified, if required, by the normal arithmetic units. For this reason, a common name is required for any sequence of 32 digits which may be either a number or an instruc- tion; the name chosen for this purpose is "word". DELAY LINE STORAGE The main type of storage unit is founded on a delay element which after a constant delay reproduces at its output terminal any, signal applied to its input terminal. In the simplest case, the delay is 32 microsec. Such an element is shown in Figure 1.1 with switches for input and output. Suppose that switch D is opened to connect the input with the delay, a single pulse is applied to the input and enters the delay, and switch D is immediately closed. The pulse will travel along the delay, emerge at B 32, microsec later and immediately return to point A via switch D. It will then retraverse the delay and appear at B after a further 32 microsec. This process is repeated indefinitely, provided switch D is not disturbed; a single pulse appears regularly at B, once every 32 microsec. In effect, a word has been stored which consists of NS-y-37/11-57

Page 2

a single "1" and 31 zeros. Any other pattern could equally well have been stored, since the successive digits would follow each other through the delay and emerge in their proper order. To store a particular word, its successive digits are applied at the input, switch D in opened and the digits flow into the delay; after 32 microsecs the last digit has just entered the delay and the first is about to emerge; at this moment, switch D is closed to complete the circulation path. The successive digits as they emerge at B are transmitted back to A and re-enter the delay; no more digits are accepted from the input. Any word previously stored in the system has now been lost, since the circulation path was broken during the process of introducing the new one. A copy of the word currently being stored may at any time be obtained at the output simply by operating switch S. Switch D is known as the "Destination Gate", switch S as the "Source Gate". MINOR CYCLES It will be observed that the word is stored like a whiting; it appears repeatedly at point B, its last digit always being immediately followed by its first. There is thus no indication in the stored digits of where the word begins and ends. The Operation of the DEUCE is con- trolled by a sequence of short pulses which occur incessantly at intervals of 32 microsec; every operation begins at one of these pulses and ends at another. The period of 32 microsec between two successive control pulses is called a "minor cycle" (abbreviated "m.c.") The 32 digits of a word which are applied to A during one minor cycle, appear at B during the next; thus a control pulse always marks the moment when one word has just ended and the next (or a repeat of the same one) is about to begin. LONGER DELAY LINES In the same way that 32 digits are stored in a delay element of 32 microsec, 1024 digits may be stored in a delay element of 1024 microsec. These 1024 digits are generally regarded as making up 32 words of 32 digits each; this longer delay thus provides 32 storage positions for single words. These words appear in rotation at the output in succes- sive minor cycles; to keep track of them the minor cycles are numbered from 0 to 31 and then starting again at 0. A sequence of 32 minor cycles is called a "Major Cycle". It is clear that a word which emerges from the delay in minor cycle 5 of some Major Cycle will reappear in m.c. 5 of the next and every subsequent Major Cycle until it is replaced with another word. The word is said to be stored in m.c. 5 (of this Delay Line). To replace this word with a new one without affecting the contents of any other minor cycle. the Destination Gate must be opened only during m.c. 5; also, the new word to be stored must he presented at the input during this minor cycle, whether or not it is repeated in the previous and succeeding minor cycles. For every minor cycle in which the Destination Gate is open, the word previously stored will be replaced by NS-y-37/11-57

Page 3

the word then being applied to the input. The timing of the Destination Gate must therefore be closely controlled; a special signal is supplied for this purpose. It will be seen, however, that the timing requirement for the Source Gate is far less stringent. LAYOUT OF DELAY LINE STORE The DEUCE storage system includes twelve of these 1024 microsec delay lines, four of 32 microsec each and also three of 64 microsec for two words each and two of 128 microsec for four words each. The delay lines are numbered from 0 to 21, and each number is prefixed by a two- letter code which indicates the storage capacity. The complete layout is as follows: Delay Words Stored Name Number References 1024 microsec 32 each "Delay Line" 12 DL1 to DL12 32 microsec 1 each "Temporary Store" 4 TS13 to TS16 128 microsec 4 each "Quadruple Store" 2 QS17 and QS18 64 microsec 2 each "Double Store" 3 DS19,DS20,DS21 NOTATION FOR QS AND DS STORAGE The four words in a QS are said to be stored in minor cycles 0, 1, 2 and 3. though the word in m.c. 3, for instance, emerges not only in m.c.3 but in m.c. 7, 11, 15 ... 27 and 31. It may be used or replaced in any of these minor cycles. The word emerging from QS 17 in m.c. 3 is said to be stored in 173; this notation is used for all DL, QS and DS, though the range of numbers appearing as the suffix is different in the three cases. The two minor cycles of a DS are numbered "2" and "3" rather than "0" and "1"; this is to avoid confusion with the "0" meaning "odd minor cycle". Comparing a DL with a TS it will be seen that the DL has the advan- tage of storing 32 times as much information with very little extra equipment; on the other hand, a given one of the 32 words stored is available for use or replacement only once in a Major Cycle instead of in every minor cycle. By using a range of TS, DS, QS and DL it is intended to have the best of both worlds, very rapid access to the words in imme- diate use combined with economy of storage equipment. This principle will be discussed further when we come to consider the Magnetic Store and its relation with the Delay Line store. INTERCONNECTIONS IN THE DELAY LINE STORE Figure 1.2 shows DL1, DL2, TS13 and TS14, with their common connec- tions. The common connection of all Input and Output points is called the Highway. The process will be described of transferring a word from one position to another within this elementary store. It will not yet NS-y-37/11-57

Page 4

be clear why this procedure is in any way useful, but we will let that pass for the moment. To replace the word in TS13 with a copy of that in TS14, the first thing is to open S14; repeated copies of the word in TS14 flow through the Highway and appear at all the Destination Gates. D13 is now opened; the word on Highway flows into TS13, while the old word in TS13 is lost, digit by digit, as it emerges from the delay. After 32 microsec (or more, it does not matter in this case) D13 is closed, trapping the word from TS14 in TS13. The Computer is now free to proceed to its next operation. This might be to replace the word in 27 with a copy of that in 14. The procedure is the same, except that in this case it is essential for D2 to be opened sharply at the beginning of m.c. 7 and closed equally suddenly at the end. Otherwise, more than one word in DL2 will be replaced with copies of the one in TS14. To replace the word in 27 with a copy at that in 17, S1 may be opened at any time; it is again essential for D2 to be opened only during m.c. 7. A direct transfer is impossible from, say, 112 to 27; this process can be effected only in two stages, transferring first from 112 to any idle TS and then from there to 2. Similarly, direct transfers cannot take place from (DS) 192 to (DS) 213 , to (QS) 171, or to any odd minor cycle in a DL, or from (QS) 183 to 192, to 171,or to any minor cycle of a DL other than m.c. 3, 7, 11, 15, 19, 23, 27 or 31. Incidentally, transfers are possible which last for any integral number of minor cycles up to 32. This timing, of course, refers to the opening of the Destination Gate for the relevant period; the Source Gate is always opened for a period which overlaps this at both ends. For instance, one may in one operation replace the words in DL1 m.c. 21 to 24 either with four copies of the word in TS16, with two copies each of the two words in DS20, with one copy each of the four words in QS18 or with the four words in DL2 m.c. 21 to 24. OTHER SOURCES AND DESTINATIONS The DEUCE works by carrying out a sequence of transfers in a pre- Determined order. For each transfer, the Source and Destination numbers must be specified, as well as the minor cycle or sequence of minor cycles for which Transfer is to take place. There are 32 Sources and 32 Destinations, each numbered from 0 to 31. 21 Sources and 21 Destinations are associated with the different storage positions. The other 11 of each are connected to various pieces of equipment for doing arithmetic operations and controlling the input and output devices. In these cases, there is no particular relationship between the Source and Destination bearing the same number. NS-y-37/11-57

Page 5

In the usual abbreviation, a transfer from S14 to D13 for example is Written "14-13". Where a DL is involved, the minor cycles of operation Must also be specified as in "4-7 (m.c. 14, 15 and 16)". In some cases, only the number of m.c. is relevant; "18-17 (4 m.c.)" replaces all four words in QS17 with copies of those on QS18; this is not affected by which four minor cycles are used for the transfer, and it could, in fact, go on for more than four minor cycles without further effect. INSTRUCTIONS Each transfer is specified by an "Instruction"; this is a word of 32 digits coded in a special way to represent the required transfer. The precise form of coding will be described later; it will suffice for the moment to say that any of the transfers mentioned as examples are capable of being represented by an Instruction within this code. CONTROL MECHANISM There is a part of the DEUCE called "Control" whose function is to interpret Instructions from the coded form and make the necessary connections for them to be obeyed. Instructions to be obeyed are nor- mally stored in the Delay Line store; the Control incorporates a special storage line, TS COUNT, in which is held the Instruction currently being obeyed. The pattern of operation is to take an Instruction into TS COUNT, set up the necessary connections and obey it, and then take in the next Instruction. Since the computation performed is determined as much by the sequence in which Instructions are obeyed as by the individual Instruc- tions themselves, it is arranged for each Instruction to specify, as well as the Source. Destination and minor cycle or cycles of transfer, the storage location of its successor. INSTRUCTION HIGHWAY There are two entrances by which a word may reach Control to be obeyed as an Instruction. The usual one is available only to words stored in one of the first eight DLs (DL1 to DL8 inclusive), a maximum total of 256 words. Each of these DLs has, as well as its Scores and Destination Gates, an extra gate called its "Next Instruction Source Gate". These are numbered from 0 to 7, numbers 1 to 7 referring to the corresponding DL and number 0 referring to DL8. These eight "NIS" Gates lead, not on to the main Highway, but on to a special "Instruction High- way" (IHW) which leads in turn to Control. The connections for DLs 1, 2 and 8 are shown in Figure 1.3. By opening only the NIS Gate specified in the current Instruction, Control ensures that the next Instruction will come from the required DL. There remains the timing problem of picking out from IHW the correct one of the 32 words in that DL. This is solved by admitting the IHW signal into TS COUNT through a special gate which is opened only for the minor cycle in which the required new Instruction word is emerging from its DL of residence. NS-y-37/11-57

Page 6

The second entrance to Control is described in the next paragraph but one. TIMING SIGNALS Control is thus required to generate two timing signals. One opens the selected Destination Gate and thus controls the main Transfer Timing; this signal is called Transtim or TT. The other opens the gate into TS COUNT and thus controls the Timing at which Control takes in the new Instruction; it is called Timci or TCI. The only other signals emerging from Control are the three sets of Selection signals, one set each for Source, Destination and Next Instruc- tion Source. DESTINATION "0" The other entrance to Control is through a special Destination Gate which has been given the number "0". Operation of this gate usurps the IHW connection to TS COUNT and replaces it with a connection from the main Highway. Thus by this means it is possible to inject into TS COUNT as an Instruction any word which is available at a Source. For instance, the Instruction "13-0" takes as its next Instruction the word currently stored in TS13. The connections are shown in Figure 1.4. It will be seen that a word from HW transferred to D0 has still to pass through the TCI gate; this means that both TCI and TT signals must be present simultaneously for the Instruction to take effect. DISCRIMINATION It frequently occurs in the course of a computation that what is to be done next depends on what has already happened. Reduced to its essentials this requires the existence of an Instruction which is capable of being followed by either of two successors depending, in some sense, on "circumstances". This requirement is met by two special Destinations D27 and D28. An Instruction which transfers a number to one of these Destinations picks its succeeding Instruction word from either of two Locations (in practice, adjacent minor cycles of the same DL) depending on some characteristic of the number transferred. D27 discriminates between positive and negative numbers, D28 between zero and non-zero numbers. For example, which of two possible Instructions comes next after "13-27" depends on the sign of the number in TS13. D27 and D28 work by modifying the TCI Gate timing signal, and therefore form part of Control. Figure 1.5 shows the Control as a block with all its input and output connections. ARITHMETIC OPERATIONS An essential function of a Computer is to carry out some selection NS-y-37/11-57

Page 7

of arithmetic operations. In the DEUCE, this is achieved with the same "transfer" type of operation by giving special facilities to certain of the Sources and Destinations. Each of these arithmetic Sources and Destinations is associated with a particular TS or DS (sometimes with two, as in the case of multiplication where a TS is used to store the multiplicand and a DS holds the multiplier at the beginning and the double-length product at the end of the operation. But this is compli- cated - we will start with a simpler example). ADDITION Addition may be performed by using D25, which is associated with TS13. The arrangement is shown in Figure 1.6. The function of the box Marked "+" is to add together the two numbers applied at the input Terminals A and B and to present the sum of the two at the output terminal C. It will be appreciated that the two sequences of pulses and spaces at A and B may be taken to represent two binary numbers, that these two binary numbers have a unique binary sum, and that this binary sum can in turn be uniquely expressed as a sequence of pulses and spaces. This is the output signal produced by the "+" box or "Adder". If D25 is not being used, the signal at A always represents the number zero; the signals at C and B are then identical and TS13 acts as a simple storage position for all purposes, the Adder appearing as a short- circuit between B and C. When a transfer is made to D25, the number or numbers transferred are added to the previous contents of TS13. A few examples of such transfers will be given. "14-25" replaces the number in TS13 with the sum of those previously in TS13 and TS14 (TS14, of course, remains unchanged). "14-25 (3 m.c.)" adds three times the number in TS14 to that previously in TS13. "13-25" doubles the number in TS13 or, to put it another way, shifts the number in TS13 up by one binary place. "13-25 (5 m.c.)" gives a shift up of five binary places. "1-25 (32 m.c.)" adds the 32 numbers in DL1 together into TS13. It will be observed that D25 and D13 cannot both be used at once; an Instruction contains only one Destination number. ARITHMETIC SOURCES Several Source numbers are allocated to arithmetic operations. As in the case of arithmetic Destinations, only one example will be given at the moment. We have seen how to shift a number upwards by putting it in TS13 and using D25. A number may be shifted downwards by putting it in TS14 and using S23. The connections are shown in Figure 1.7. The box "L" has one input at A and two outputs at B and C. That at B is identical with the input, that at C represents the input number divided by two, that is shifted down by one binary place. The Instruction "23-14 (6 m.c.)" has the effect of shifting the number in TS14 down by six binary places. NS-y-37/11-57

Page 8

FIXED NUMBERS Certain useful fixed binary configurations are permanently available At Sources. These include "all zeros" at S30, "all ones" at S31 and at S27 a configuration containing a single "1" in the least significant position. This last in called "P1". The Instruction "27-25" adds one to the number in TS13. The method of generating P1 will be described later; for the present the notation of Figure 1.8 will be used. INPUT AND OUTPUT Numbers and Instructions reach the Machine from outside by being injected on to Highway through Source 0. In the course of a computation, the Computer assimilates new information when required (either more data or further Instructions) by obeying an Instruction with Source number "0", which has been included in the program. To get started in the first place, a key is pressed which clears the whole Delay Line Store; this leaves to be obeyed the Instruction "0-0", which has the effect of reading a single (Instruction) word from the Input to TS COUNT. This single spy is used to call in a platoon, a company and finally the big battalions. Calculated results are sent out from Highway through D29. A schematic of SO and D29 is given in Figure 1.9 for the sake of complete- ness rather than explanation. Input and Output, by the way, is always in signal notes. The Instruction "0-4 (m.c. 7)" sends the word currently at the Input to 47; "14-29" sends the word in TS14 to the output. These few notes on Input and Output have no doubt raised more questions than they have answered; these will be dealt with, it is hoped, in later sections of this report. DESTINATION "TRIGGERS" All the operations so far described have had some genuine element of "transfer" in the sense that digits flowed from one part of the Machine to another. There remain some cases, however, in which this is not true. The problem is to fit these into the "Source and Destination" framework so that the same form of Instruction word can be used. One special Destination is therefore allotted jointly to all these operations which lack the "transfer" element; this is D24, called "Destination Triggers". There are about a dozen of these operations altogether, each of which is specified by a particular Source number used in conjunction with D24; a few examples will be given. Information normally comes into the DEUCE punched on Hollerith cards which pass successively through a Reading machine in response to a demand from the Computer. This demand is the Instruction "12-24" which causes a sequence of cards to start passing through the Reader; the flow may be stopped at any time by the Instruction "9-24". Output of information NS-y-37/11-57

Page 9

is through a Punching machine which is fed with a supply of clean cards; the Punch in started by "10-24" and stopped by "9-24". The same Instruction is used to stop either the Reader or the Punch because they are never in practice used at the same time. The DEUCE contains an automatic Multiplier and an automatic Divider; operation of these is initiated respectively by "0-24" and "1-24". In these cases there is no corresponding stopping Instruction, since both circuits are arranged to stop themselves automatically as soon as the arithmetic operation is complete. Figure 1.10 shows the D24 connections. It will be seen that there is no concoction with Highway; this permits the dual function of the Source selector. Obeying an Instruction with Source number 12, for example, means both that the contents of DL12 will appear on Highway and that if the Destination number is 24 the Reader will be started; in the latter case, the contents of Highway is irrelevant, since none of the Destination gates connected to it is open. The two "switches" labelled "S12", for example; one connected to Highway and one to Destination Triggers; actually represent two separate electronic gating circuits operated by the same control signal. THE MULTIPLIER The operations of multiplication and division are somewhat different from the arithmetic operations so far described. Only the Multiplier operation will be described at present, since that of the Divider is similar. A Multiplication requires several Instructions; first the two factors must be sent to particular storage positions, the multiplicand to TS16 and the multiplier to DS213. Next, DS212 must be cleared. Now we are ready. The Multiplier is brought into action by obeying the Instruction "0-24", which uses Destination Triggers. After 65 minor cycles, multiplication is complete, and the product, which comprises 64 digits, remains in DS21. The multiplier has been lost but the multipli- cand remains in TS16. The Multiplying circuit automatically switches itself off 65 m.c. after the start. Figure 1.11 shows a schematic of the system. MAGNETIC STORE As well as the Delay Line Store, the DEUCE has an auxiliary store, called the Magnetic Store, for about 8000 words. This is much larger than the Delay Line Store, but the information takes a longer time to get into and out of it. The Magnetic Store works by taking information from the Delay Line Store, holding it, and returning it later when it is wanted. Information is transferred in either direction, always in blocks of 32 words, and always to or from DL11. In other words, the two operations NS-y-37/11-57

Page 10

in which the Magnetic Store is concerned are to transfer the whole contents of DL11 into the Magnetics and to transfer a clock of 32 words from the Magnetics into DL11. Two special Destinations, D30 and D31 are allocated the job of initiating these "Magnetic Transfers". Figure 1.12 shows the system, only one Magnetic Control Destination, i.e. D30, being shown. MAIN SCHEMATIC OF THE DEUCE We are now in a position to assemble the various components so far Described into a coherent whole. Figure 1.13 is a schematic of the whole machine. For the sake of simplicity, only one or two examples have been included from each group of parts of a similar type; for example, from the group of five Sources S27(P1), S23(P17), S29(P32), S30(Zeros) and S31(Ones), only the first is explicitly shown in the figure. We will trace through the successive operations of "obeying an Instruction". Suppose the Instruction enters TS COUNT in minor cycle "m". In m.c. (m+1) it first enters the main part of Control and the three selectors are set up; nothing else happens in this minor cycle, which is therefore known as the "set-up" minor cycle. The Source and NIS selection take immediate effect, in the sense that digits from the selected Source immediately begin to flow into Highway and that digits from the selected NIS immediately begin to flow Into IHW. The Destination selection does not take effect until Transtim signal is supplied. The transfer specified by the Instruction may commence with any minor cycle from (m+2) to (m+33) and may continue for any integral number of minor cycles from 1 to 32. Thus after the set-up minor cycle there is a pause of from 0 to 31 m.c. as specified in the Instruction; then Transtim signal is applied for a period of from 1 to 32 m.c. and "transfer" takes place for this period. This "transfer" may be a simple transfer of words between sections of the Delay Line Store; it may be an addition in TS13 or a shift in TS14, it may be the initiation of a multiplication or division, of a passage of cards through the Reader or Punch, or of a Magnetic Transfer; it may be the transfer of a word from the input or to the output; it may be the insertion of a number into the Discrimination circuits to determine, according to its sign, the selection of the next Instruction; it may be the direct insertion into TS COUNT of a word which has been built up in a TS by arithmetic action and is now required to be obeyed as an Instruction. Which, of all these, is determined by the particular Source and Destination numbers speci- fied in the instruction. For all this time, the successive words in the DL whose NIS has been Selected have been flowing into IHW and presenting themselves in turn at the TCI gate into TS COUNT. Once the transfer has been completed and Transtim removed, TCI signal is supplied for that single minor cycle in which the required next Instruction emerges from this D.L. Thus the next NS-y-37/11-57

Page 11

Instruction gets into TS COUNT and the cycle of operation begins again. Since the new Instruction passes once through TS COUNT before it reaches the main part of Control to take effect, it may actually be admitted to TS COUNT during the last minor cycle of Transtim, though never, of course, any earlier. This enables a minor cycle to be saved in the operation time of a large number of Instructions, and is essential in any transfer to D0. NS-y-37/1<1-57

Page 12

MAIN COMPONENT PARTS

In physical form, the DEUCE may be said to consist of six main parts Joined together by electrical connections, though two of them are also joined together physically. They are the Main Frame, the Control Panel, the Reader, the Punch, the Delay Line Store and the Power Unit. READER AND PUNCH The main input and output of information, including the input of the Program, is by Hollerith cards. The DEUCE must therefore incorporate devices for reading and punching these cards. In each case, a standard piece of Hollerith machinery has been modified by replacing its electric circuits with relay mechanisms which link its operation with that of the Computer. The Reader is made from a Balancing Tabulator, the Punch from a Gang Punch. Both are joined with the rest of the DEUCE by cables. MAIN FRAME The electronic circuits comprise about 1450 valves with their Associated components. These are mounted in about 68 chassis each of which has 20 or 30 valves. A chassis consists of a more or less flat plate with the valves sticking out on one side and the components mounted on the other. The individual chassis are mounted in a Main Frame which consists of nine vertical racks solidly mounted together, each capable of holding eight chassis. Each chassis is a self-contained unit, connected to the Main Frame by a pair of plugs and held in place by two bolts. One of the plugs carries the power supplies which are in a standard arrangement for all chassis; the other carries the signal connections between chassis. Most chassis are individual and not like any other, but there are a few groups of identical chassis. For instance, the gates and some of the amplifiers associated with a delay line storage position are made up into a standard chassis called a Circulation Unit. There are, of course, 22 copies of this chassis in the machine, one for each storage location including TS COUNT. The Magnetic Storage Drum is also mounted in the Main Frame on a special chassis not of the standard shape. POWER UNIT The Power Unit takes in a three-phase mains supply and produces all the d.c. and a.c. voltages required by the rest of the DEUCE. There are NS-y-37/11-57

Page 13

seven d.c. lines to the Main Frame, -300v, -200v, -100v, earth, +100v, +200v and +300v. Special d. c. supplies are also required for the Reader and Punch and for the relays in the Control Panel. Valve heater supplies are generated by transformers mounted on the Main Frame fed with a.c. mains voltage from the Power Unit. The mains switching is done by contactors operated with buttons; a duplicate set of buttons is mounted on the Control Panel. DELAY LINE STORE The twelve long delay lines of 1024 microsec each are mounted in a Small thermostatic chamber connected by cables to the Main Frame. Above the periphery of the upper part of the chamber are mounted a pair of amplifiers to each DL, one power amplifier for the input signal, one high gain amplifier for the output signal. The complete unit is capped by an overhanging lid giving the appearance of a mushroom. CONTROL PANEL The Control Panel, which is mounted on the main frame, carries a Multiplicity of keys, buttons, lamps and monitors which are not used much when the DEUCE is working normally on computation. The Control Panel comes into its own in investigating faults in the operation of the Computer and when testing and correcting the operation of a new program. The Control Panel carries a row of 32 keys for the input of single numbers and a row of 32 lamps for the output of single numbers, an alarum buzzer and lamp to indicate the failure of an internal check in the program, two monitor cathode-ray tubes for displaying the contents of the various delay line storage positions, and keys for imitating almost everything that the DEUCE normally does automatically. For instance, there is a key labelled Transtim which, when pressed, gives continuous transfer between whatever source and destination are selected; another key, labelled TCI gives, when pressed, continuous entry to TS COUNT for the words on IHW. Pressing a key called External Tree overrides the NIS, S and D parts of the word in TS COUNT and replaces them with the con- figuration set up on a row of 13 keys (one for each digit) also mounted on the Control Panel. There are keys for specifying the result of a discrimination indep- endently of the number transferred, for starting and stopping the Punch or Reader and for many other purposes. When considering the detailed operation of the Machine, we shall frequently come across signal lines to and from the Control Panel which have no part in the normal operation and are used only for usurping the normal arrangements in time of emergency. NS-y-37/11-57

Page 14

LOGICAL DIAGRAMS

Having put the DEUCE together as rapidly as possible, we may now take it apart at our leisure and examine the component sections. Before doing so we must expand one of two of the many over-simplifications in the preceding paragraphs and introduce the notation which will be used to describe the operation in detail. WIDE AND NARROW PULSES Within the Computer, the pulse interval is always 1 microsec, but the width of the pulse representing a digit "1" may take either of two values, depending on the point in the Machine at which the pulse train appears. (a) Narrow Pulses Pulse width about 0.3 microsec. There is a clear gap between two pulses representing adjacent "1"s. This type of signal may be fed through an a. c. coupling, and is mainly used in connec- tions between units. (b) Wide Pulses Pulse width 1 microsec. A row of "1"s and a row of "0"s are represented respectively by two different d.c. levels. This type of pulse is normally used in arithmetic units, where successive digits of two input signals are combined to generate the pulses of a waveform representing, say, the sum of the numbers coming in. This technique eliminates most of the effect of the timing errors inevitable at these speeds of operation. For instance, a timing difference of 0.2 microsec between the two input waveforms would remove two-thirds of the overlap bet- ween two narrow pulses, while the period of coincidence between two wide pulses would be cut by only 20%. Wide pulses are also used in the DELAY elements of the storage, in this case modu- lating a carrier signal of frequency 16 Mc/s. The three possible signals representing the number "13" are shown in Figure 3.1. In the first two cases, either positive or negative pulses may be used. Since the types of signal are used for different purposes, it is often necessary to generate signal (b) from signal (a) and vice versa. LOGICAL DIAGRAMS AND SYMBOLS In describing the operation of parts of the DEUCE, three main types NS-y-37/11-57

Page 15

of diagrams will be used. Two of these, the circuit diagram and the conventional "block schematic", need no explanation. The third type, which is peculiar to this kind of work, is the Logical Diagram. This also consists of a number of symbols connected together by lines which carry signals. The nature of these signals, however, is not specified; they are either present or absent, and have no other characteristic. Each symbol represents a logical unit which gives an output signal completely determined by its one or more input signals. The electronic circuit by which this required effect is achieved may take any of a number of forms, but the same logical symbol is used for all. Each line is marked with an arrow, and can convey a signal in only one direction. The polarity of a signal has no place in a logical diagram, nor have such units as power amplifiers. It is even possible to give a complete logical diagram of the DEUCE without referring to wide and narrow pulses. This will not be attempted here, since the present object is to explain the operation of the Machine in terms of its circuits, using logical diagrams only as an immediate stage. A logical diagram may be regarded as dealing directly with numbers, a signal which is present in alternate microsecs, for instance, being written "010101 ...". LOGICAL SYMBOLS The logical symbols which will be used in this report are set out in Figure 3.2 and described below. Typical input anal output signals are given in each case: One-Gate A signal appears at the output whenever a signal is applied to either (or both) of the two inputs. In cases where simultaneous signals at the two inputs cannot occur, the One-Gate may be replaced by a simple connection. Inhibitor-Gate The signal at the normal input (A) appears unchanged at the output, provided there is no signal at the inhibitor input (B). With a signal at the inhibitor input, there is no output, whatever the normal input. Two-Gate A signal appears at the output only when one is applied to both of the two inputs. In practice, at least one of the two inputs to any gate must have wide pulses, to avoid timing difficulties. General Gate This has any number of normal and inhibiting inputs and is marked NS-y-37/11-57

Page 16

with the number "n". Output signal occurs Only if "n" or more of the normal inputs carry signal, and none of the inhibiting inputs do. Negator A negator has one input and one output Connection. It gives a signal at the output if, add only if, no signal is applied to the input. Unit Delay The input is exactly reproduced at the output, except that each digit appears 1 microsec later. Longer or shorter delays are indicated by writing the delay, in microsecs, inside or beside the "D". Beginning Element This gives a single pulse at the output starting coincidentally with the beginning of any continuous signal at the input. End Element This gives a single pulse at the output starting coincidentally with the end of any continuous signal at the input. For a particular begin- ning or end element, the duration of the "single pulse" at the output is fixed by the values of the electronic components. There are a large number of such elements in the Computer, with output pulses varying from a small fraction of a microsec to several millisec, depending on the function which the output signal is required to perform. The exact width of the output pulse is never critical; its approximate duration will in general be clear from the context. Trigger A signal at the trigger input (J) is said to "stimulate" the trigger or to put it on. One at the inhibitor input (K) "clears" the trigger, or puts it off. So long as the trigger is on it gives a continuous signal at the output which represents a succession of "1"s. A signal at the trigger input while it is on, or one at the inhibitor when it is off, has no further effect. The output is always in the form of wide pulses. The inputs may be either wide or narrow pulses, or, in fact, any other form of signal pattern. Changeover Trigger This trigger is stimulated and cleared by alternate signals at the same input. A signal arriving while the trigger is off puts it on, and vice versa. NS-y-37/11-57

Page 17

Widener A narrow pulse of signal at the input initiates a 1 microsec pulse of signal at the output, beginning the same time as the input signal. It will be seen from the figure that the centre of the widened pulse is nearly half a microsec later than the centre of the original narrow pulse; thus a widener always introduces a concomitant delay of about half a microsec. Longer Delays Delays of 32 microsec or more used in the high-speed store will be denoted by a box with the delay period written inside. Composite Gate This has two outputs, one giving signal only when the two inputs differ, and the other giving a signal only when there is signal at both inputs. The diagram shows how these functions could be built up, as they usually are, by combination of previous symbols. The special symbol has been introduced here to give closer correspondence with the electronic circuit. Input Signals The operation of the computer may be modified by an external stimu- lous from the Main Control Panel or elsewhere. A source of such stimuli is represented by a square box with one output connection which carries signal when the source is stimulated and not otherwise. Examples of Logical Diagrams Figure 3.3 shows two small examples of the use of these symbols in combination. Multiway Gate To connect a selected one of five input signals on to a common out- put line, a control signal is sent to the appropriate 2-Gate and to none of the others. So long as this signal is maintained, this Gate gives an output which is the same as its input; the others give no output at all. A similar circuit will connect a common input signal to a selected one of several output lines. Changeover Gate A single control signal is used to choose between only two alterna- tive connections. With no control signal, input 1 passes through Gate A to the output and gate B gives no signal. When a continuous central NS-y-37/11-57

Page 18

signal in applied, Gate A is inhibited and gate B gives a signal which reproduces input 2. Source and Destination Gates Figure 3.4 shows a few bits of the Machine drawn in the new notation. The "Highway Amplifier" box at the top is a power Amplifier which intro- duces a short delay (about 0.15 microsec); for this reason, the sections of Highway connected respectively to the Sources and to the Destinations are called "Highway (Early)" and "Highway (Late)" Pulses on Highway are always narrow; each delay line therefore has on associated widener, modulator, detector and clock-pulse gate; these are not shown in the diagram. Signal is always supplied to just one of the lines S0, S1 ... S31, and one of the lines DO, D1 ... D31 and one of the lines N0, N1 ... N7. The Destination selector signal is effective only in conjunction with Transtim. NS-y-37/11-57

Page 19

FUNDAMENTAL WAVEFORMS

The operation of the DEUCE is controlled by certain basic waveforms Which determine the timing of the digits and, where necessary, distinguish Between the digits of a word. CLOCK PULSES This signal is a continuous sequence of pulses, 0.3 microsec wide, at 1 microsec intervals. It is used in converting a word from wide to narrow pulses, and thus controls the timing of digits throughout the Machine. A "Clock-Pulse Gate" is shown in Figure 4.1. Q-PULSES There are 32 of these signals, corresponding with the successive digits of a word. They are known as "Q1", "Q2", and so on, up to "Q32". Each consists of a 1 microsec pulse repeated every 32 microsec; it would represent, in wide pulses, a number with 31 zero digits and a "1". In Q1, this single pulse coincides with the first digit of a word; in Q2, with the second, and so on. The signals are shown in Figure 4.2; they are used to initiate any action required at a particular time in the minor cycle and to pick out a particular digit from a word. This second function is important in interpreting instructions and in the input and output mechanisms. The narrow equivalent of a Q-pulse is a "P-pulse". Only a few of these are used, and they are generated from the corresponding Q-pulse by a Clock-Pulse gate in the particular chassis where they are wanted. THE INPUT DYNAMICISER The number is first presented to the Machine in parallel form, that is with all the digits there at once, spread out across a row of relays or of holes punched in a card. Before it can reach the storage or the arithmetic units, the number must be translated into serial form, with all the digits appearing on a common line, one after another. This is done in a set of 32 circuits known collectively as the "Input Dynamiciser". The first six stages of the I.D. are shown in Figure 4.3. The switches which are "on" represent energised relays or holes punched in one row of a Hollerith card. The others are unenergised relays or blank spaces on the card. They are set in the diagram to represent the number 13. In successive microsecs Q1 flows through its switch to the common NS-y-37/11-57

Page 20

line, Q2 appears, but gets nowhere, Q3 and Q4 go through and Q5 and Q6 are baulked. The final signal is shown before and after "clocking". THE OUTPUT STATICISER The reverse translation from serial to parallel form is needed before a number can be displayed on a row of lamps or punched on a row of a card. This is done by the Output Staticiser, six stages of which are shown in Figure 4.4. The input signal is again the number 13, expressed in narrow pulses. Suppose that initially, all the triggers are off. In the first microsec, a narrow pulse arrives at the input and is presented at all the 2-Gates; at this time, only the Q1 line carried a signal, so only this gate gives an output, which stimulates the first trigger. In the second microsec, no pulse appears at the input, and nothing happens. Two succes- sive pulses now arrive, the first combining with Q3 to give an output which stimulates the 3rd trigger, and the second coinciding with Q4 to put the fourth trigger on. No further pulses arrive at the input, and none of the remaining triggers in struck. The number 13 is now represented in parallel form by signals coming from only the 1st 3rd and 4th of the row of 32 triggers. These triggers are connected either to the 0.S. lamp on the Control Panel or to the magnets in the Hollerith Punch which control the punching. Before a second word can be set up on the O.S., all the triggers must be cleared by a signal on the "Clear O.S." line. When using the row of lamps, this signal may be supplied either by obeying the Instruc- tion "18-24" which uses Destination Triggers, or by pressing a key on the Control Panel. When punching numbers on a card, the signal is auto- matically supplied by the Hollerith Punch as soon as each row has been punched. To staticise or dynamicise a word takes a time of 32 microsec. This causes no difficulty, since a row of a card remains under the read brushes or punch knives for much longer than this. So far, we have considered input and output only in binary form; no extra provision is made for decimal input and output, since a card is read or punched one row at a time as a sequence of twelve binary configurations, even if the pattern of holes in it is intended to represent one decimal number. The problem of combining these twelve configurations to form the same number in binary form, or of creating them from a single binary number, is one of programming rather than Machine design. THE OSCILLATOR The fundamental timing waveform is generated by an oscillator circuit, controlled by a crystal to a frequency of exactly 1 Mc/s. This signal ultimately controls the timing of individual digits throughout the DEUCE. Three connections are taken from the oscillator, as shown in Figure 4.5. NS-y-37/11-57

Page 21

From the lowest of the three output connections shown, the original 1 Mc/s signal is taken to the Divider where it controls, eventually, the timing of the Q-Pulses. The Clock-pulses are generated directly from the 1 Mc/s signal in a Shaper circuit, and transmitted through a power amplifier to the middle Output connection. The amplifier is needed because of the large number of points in the Machine to which this terminal is connected, and the correspondingly large output capacity. Between the oscillator and the divider is a phase-shifter circuit incorporating a manual control; varying this adjusts the timing of the Q-Pulse signals relative to the Clock-pulses (Figure 4.6). The signal at the upper output connection is an 8 Mc/s sine wave; this is connected to every storage position, in each of which the frequency is again doubled to give the 16 Mc/s signal which provides the carrier wave in the mercury delay lines. THE DIVIDER The main object of the Divider is to generate from the original 1 Mc/s waveform an output waveform with a period of 32 microsec. This is subsequently used to drive, in succession, the 32 circuits generating the Q-Pulse waveforms. There are also two outputs which control the precise timing of the Q-pulses. The logical arrangement of the divider is shown in Figure 4.7. It Consists mainly of a chain of five changeover triggers connected together with beginning elements. The first is operated by the 1 Mc/s waveform; it is therefore on and off for alternate periods of 1 microsec, giving a waveform at B whose total period is 2 microsec. A narrow pulse is therefore applied to the second trigger every 2 microsec; this trigger is thus on and off for alternate periods of 2 microsec, giving a narrow pulse every 4 microsec at F. This process continues until, finally, a narrow pulse occurs at L once every 32 microsec, coincident with one of the pulses at D which drive the Divider from the second stage onward. The pulses at K1 and K2, each with a period of 2 microsec, are Exactly interleaved. The K1 signal controls the end of every odd Q-pulse, that at K2 the end of every even Q-Pulse. Trigger "DRS" is stimulated every 32 microsec by the pulse at L, and cleared by the next K1 pulse, 1 microsec later. Its output signal, however, lasts for slightly less than 1 microsec, since the pulse at L is in practice later than the corresponding K2 Pulse, owing to the circuit delay in the last four divider stages. The final output at N, or "R(out)" is thus a pulse occurring every 32 microsec, truly coincident in time with one of the K1 pulses. This pulse is used to initiate the Q32 pulse. The vertical lines at the bottom of the waveform chart indicate the end of successive minor cycles. NS-y-37/11-57

Page 22

RING STAGES The Q-pulses are generated by 32 identical circuits, called "Ring Stages". Figure 4.8 shows the connections between the R(out) signal from the Divider and the first five ring stages. Each ring stage comprises a trigger and an End element. The trigger is stimulated by the clearing of the previous trigger, and cleared alternatively by a pulse from K2 and K1. The operation is clear from the waveform chart. The other 27 ring stages follow in just the same way; the last trigger is cleared just as the next pulse arrives at R(out) from the Divider to restimu- late the first. No use is made of the narrow output pulse from the last End element, which is left unconnected. The narrow pulses marking the microsecs are separated on to the two lines K1 and K2 because if they were all presented on one common line, the stimulating and clearing pulses to each trigger would arrive simultaneously. NS-y-37/11-57

Page 23

THE CIRCULATION UNIT

The first part of the machine to be described in detail will be the Circulation Unit, one of which is associated with each delay line storage position. There are 22 of them, all identical; special facilities such as the addition and subtraction into TS13 are attached by connecting an appropriate special unit to certain connection points which are provided on all circulation units but not always used. The layout of a storage position is shown in block form by Figure 5.1. It will be explained by tracing the passage of a signal round the loop, starting at the point "H". The Signal at H, consisting of narrow pulses, enters the Widener, a standard circuit from which the digits emerge as wide pulses. These go to the Modulator, where they modulate a 16 Mc/s carrier wave, generated by the Frequency Doubler from the common 8 Mc/s signal which enters the circulation chassis from a screened cable. The signal leaves the Circulation Unit in this form through a screened cable which takes it to the Transmitter; this is contained in a small box mounted near to the mercury column. In effect, it generates a powerful copy of its input signal, which it sends along a further screened cable to a Piezo-Electric Crystal which is in intimate contact with the mercury. The function of this crystal is to vibrate in sympathy with the applied electrical signal, and so to transmit sound waves of the same frequency, which travel through the Mercury Delay Line. At the far end of the delay, the pulses of sound hit a second Piezo- Electric Crystal, which has the reverse function of accepting the acoustic waves and giving out electrical signals of the same frequency. These pass through a Transformer which matches the impedances of crystal and cable (there is one at the input end. too), and through a screened cable to the Receiver. This is mounted near to the delay, and it revives the pulses, by this stage rather weak, before sending them through another screened cable back to the Circulation Unit. The signal new passes through the Detector, which removes the 16 Mc/s element and emerges as wide d.c. pulses. A conventional Clock-Pulse Gate is used to generate two narrow-pulse signals; that at "J" represents the words being stored, while the digits at "N" are the negated version. In most cases, J is connected to K, and N is not used. In certain Storage positions, however, the signal is taken from J (and also from N, in some form of them) to a special unit of some kind; such a unit must have, among others, one output terminal where the signal J emerges unchanged in form, so that it can be connected back to K and so complete NS-y-37/11-57

Page 24

the circulation path. An example is the Logical Operations unit, which takes signal from both J14 and N14 and returns a signal to K14. (The Logical Operations unit also takes signal from J15 and N15, but without breaking the circulation path of TS15). From K the narrow pulses pass to the Source Gate, which is connected to Highway (Early), to one of the outputs of the Source Selector Tree and to a point called SC which will be explained later. Before entering the Destination Gate, to which is connected the TT signal, an output from the Destination Selector Tree, and HWL, the signal passes through a Delay Network, which introduces a delay of 0.15 microsec. The precise object of this delay, which compensates for the delay in the Highway amplifier, will be discussed below. The Source and Destination connections are a little more complicated than so far explained (see section on "Selector Trees"). Next comes the NIS gate; in the first eight Delay lines, this is connected to the NISC line, IHW and the NIS Tree. The signal emerges at G Normally, G is connected directly to H; in some cases, however, the signal at G passes through a special unit. From which it emerges in the same form to be returned to H. An example is TS13, in which is inserted the Adder Unit. This completes the circulation path; the words in store circulate indefinitely, until replaced by a new input at the Destination gate. They may, however, be modified by the special units inserted at J-K or G-H. REGENERATION The passage through the mercury and the processes of modulation and Detection introduce a degree of distortion in the signal. Also, although the length of each mercury column is adjustable, there is bound to be some error of timing. However, so long as the pulse reaching the Clock- Pulse gate is large enough to be recognisable, and so long as it is not so wide, narrow, late or early that one or both of its edges reaches the Clock Pulse on either flank, the output from the Clock-Pulse gate is just as sound in shape and timing as that which would be generated by a perfect input pulse. The errors of shape and timing are thus not cumulative; if a pulse will make one lap of the circuit without harm, then (with reasonable margins of safety) it will circulate unharmed indefinitely, TIMING The Widener, as has been pointed out, effectively introduces a delay of about 0.35 microsec; this, as well as the delay network between K and G, must be compensated by shortening the mercury line to give a delay about 0.6 microsec less than its official value. NS-y-37/11-57

Page 25

In some cases, a special unit inserted at J-K or G-H introduces a delay of 1 microsec; these delays must also be compensated by a corres- ponding shortening of the mercury line. A pulse at K occurs at the same time as the corresponding digit on HWE but about 0.15 microsec before that HWL. The effect of the delay network is that a pulse has the same timing at H whether it came straight through from K or had just entered at the Destination gate. In consequence, all pulses arrive at the Clock-Pulse gate with the same timing, giving a greater margin of error than would be obtained if a range of different input timing had to be safely accommodated. INDIVIDUALITIES The 22 Circulation Chassis are identical, and each contains the same equipment, including the Source, Destination and NIS gates. Not all of these, however, are connected in the standard manner described above. In the 21 storage positions, the Source and Destination gates are all normal, as are the NIS gates of the first eight Delay Lines. The other NIS gates are not used, the NISC, IHW and NIS Tree terminals being left unconnected. In TS COUNT, none of the three gates is normally connected. They are all used for special purposes which will be described in the chapter on Control. NS-y-37/11-57

Page 26

CONTROL

THE INSTRUCTION WORD The Instruction word comprises seven separate numbers of up to five digits each. Digits Name, Possible Values and Function 2 to 4 NIS (0 to 7) Number of Selected NIS gate. 5 to 9 S (0 to 31) Number of selected Source gate. 10 to 14 D (0 to 31) Number of selected Destination gate. 15 & 16 C (0 to 3) Characteristic. Determines the length of Transfer as explained below. 17 to 21 W (0 to 31) Wait number. Number of idle minor cycles between Set-up and 1st m.c. of Transtim. 26 to 30 T (0 to 31) Timing number. Specifies the m.c. of the next instruction and sometimes the last m.c. of Transtim. 32 G (0 or 1) Go digit. Function explained in conjunc- tion with details of Control. Digits 1, 22 to 25 and 31 are spare; they are ignored by Control and their value has no effect on the operation. CHARACTERISTIC NUMBER The function of the Timing number is modified by the value of the Characteristic, which effectively divides Instructions into three types, each of which is given a special name: Single Transfer - C is 0. Transfer is for 1 m.c. only. Long Transfer - C is 1. The number of m.c. for which TT is applied is determined by the values of W and T. NS-y-37/11-57

Page 27

Double Transfer - C is 2. Transfer is for just two minor cycles. (The Characteristic is not normally given the value 3). The details of timing will first be described for a Long Transfer. TIMING OF TT AND TCI SIGNALS FOR A LONG TRANSFER Figure 6.1 gives an example of the timing of TT and TCI in a Long Transfer (C = 1) in which W is taken as 2 and T as 4. The Instruction in question is stored in m.c. 7 of some DL; it appears on IHW in this m.c., and is let into TS COUNT by the application of TCI Signal. In m.c. 8 the Instruction first enters the main part of Control from the delay element of TS COUNT, and the various gates are selected in accordance with the NIS, S and D numbers. Minor cycle 8 is thus the Set-up m.c. After Set-up, there is a pause of W m.c.; in the figure, W is 2, and the pause occupies minor cycles 9 and 10. If the Wait number were 0, Transtim would first have been applied in m.c. 9; as it is. Transfer commences in m.c.11. The Timing number has a dual function, affecting both TT and TCI. The last minor cycle of Transfer, which is also the single m.c. for which TCI is applied, is the T + 1th after Set-up and the T + 2th after that in which the Instruction was stored. In the example, this is the 5th m.c. after Set-up, or m.c.13. The transfer occupies minor cycles 11, 12 and 13. The next Instruction enters TS COUNT in m.c.13. It must therefore have been stored in m.c.13 of the Delay Line referred to in the NIS number. It enters TS COUNT while the Transfer specified by the previous Instruction is still in progress, but it does not affect the operation until the following minor cycle, in which it first enters the main part of Control. Its NIS, S and D numbers are set up in m. c.14. GENERAL CASE The minor cycles of operation are usually referred to the minor cycle in which the current Instruction is stored, and in which (by definition) it enters TS COUNT. We will call this minor cycle "m". The Set-up minor cycle is m.c. m + 1. Transfer commences in m.c. m+w+2. The next Instruction is stored in m.c. m+T+2. (These three numbers hold for any value of Characteristic). The last m.c. of Transfer Is m+T+2, so that the number of minor cycles of Transfer is T-W+1. NS-y-37/11-57

Page 28

W GREATER THAN T The last minor cycle of Transfer clearly cannot precede the first. If W exceeds T, the effective value of T is increased by 32. Minor cycle m+T+2 is ignored, Transfer starts In m.c. m+W+2; the minor cycle in which Transfer ends and the next Instruction enters TS COUNT is m.c. m+T+34, or m+T+2 of the next Major Cycle. The next Instruction is still stored in m.c. m+T+2, but only at its second appearance on IHW is the TCI gate opened to let it into TS COUNT. As an example, take an Instruction stored in m.c.27 whose Wait and Timing numbers are 10 and 1 respectively. The minor cycles of Transfer are from 39 to 62, that is from 7 to 30 of the next Major Cycle. The next Instruction is stored in m.c.30, and enters TS COUNT at its second attempt. SINGLE AND DOUBLE TRANSFERS The minor cycles in which Transtim commences and in which TCI is applied are the same for all values of C, being m+W+2 and m+T+2 (or m+T+34) respectively. The Characteristic affects only the end of Transtim. If C is 0, Transtim is applied for only one minor cycle, m+W+2; if C is 2 Transtim is applied for two minor cycles, m+W+2 and m+W+3. The effect of Single and Double Transfer Instructions is shown in the diagram by dotted lines. When W = T and C = 2 the next Instruction cannot enter TS COUNT in m.c. m+T+2, since this would precede the second minor cycle of transfer m.c. m+W+3, specified by the Characteristic. Instead, in this special case, its next Instruction enters TS COUNT in m.c. m+T+34. DETAILED OPERATION OF CONTROL For simplicity, the logical diagram of Control will be given in sections, illustrating only that part currently under discussion. Figure 6.2 shows two features, the detailed input mechanism and the Unit Subtractor, represented as a block. DESTINATION 0 Normally, the word entering TS COUNT comes from IHW, which is con- nected only to the first eight Delay Lines. It is possible, however, by using Destination 0, to inject into TS COUNT any word which is available at a Source. If D0 is selected, and TT is applied in the same minor cycle as TCI, the word entering TS COUNT will be the one appearing in that minor cycle, not on IHW, but on HWL. Suppose, as an example, that the word currently in TS16 represents the Instruction which is to be obeyed next. A preliminary Instruction is necessary which might be: NS-y-37/11-57

Page 29

N S D C W T X 16 0 1 0 5 This preliminary Instruction reaches TS COUNT in. say m.c.9 in the usual way, through IHW, having been stored in m.c.9 of one of the first eight DLs. S16 and DO are set-up in m.c.10, and TT is applied from m.c.11 to m.c.16. During this time, the word in TS16 is repeatedly applied to the TCI input gate to TS COUNT. From m.c.11 to m.c.15, this gate is shut, but finally, in m.c.16, TCI is applied and the word from TS16 enters TS COUNT. The Wait and Timing sections of the word in TS COUNT must be calculated as if the word had been stored in m.c.16 of one of the first eight Delay Lines. The NIS number of the preliminary Instruction is immaterial, since it affects only the words on IHW, none of which succeeds in reaching TS COUNT. This procedure uses two Instructions, the preliminary one and the one in TS16, to obtain one useful Transfer, that specified by the Instruction in TS16. The facility is very useful, however, for the initial input of Instructions from the Hollerith Reader and for using Instructions which have been modified in some way by the arithmetic units. The TCI gate, by the way, is the normal Destination Gate in the TS COUNT circulation unit. THE UNIT SUBTRACTOR (FUNCTION) The Unit Subtractor takes in the Instruction word at "A" and sends it out again at "B", unchanged except that 1 has been subtracted from each of the Wait and Timing numbers. If the word at "A" is "N,S,D,C,W, T,G", it will emerge from "B" as "N,S,D,C,W-1,T-1,G". The values of T and W are thus decreased by 1 for each circulation through TS COUNT. The Unit Subtractor also gives signals at "C" and "D", which indicate when the Wait and Timing numbers, respectively, have been reduced to zero. "C", which gives a signal W m.c. after the Instruction entered TS COUNT, initiates the start of TT, and "D" initiates the end of TT (if the Characteristic is 1 in the Instruction) and the m.c. of TCI. Finally, the Unit Subtractor gives a signal at "E" which consists of the Instruction word negated. This goes to the circuits which select the appropriate NIS, S and D. UNIT SUBTRACTOR (OPERATION) Two examples will first be given of the subtraction of "1" from a binary number (least significant digit on the left). 1 2 4 8 16 1 2 4 8 16 0 0 1 1 1 (28) 0 1 0 0 0 (2) 1 1 0 1 1 (27) 1 0 0 0 0 (1) NS-y-37/11-57

Page 30

In each case, the lower number could have been obtained from the upper by negating all digits up to and including the first "1" and leaving the others unchanged. This procedure, in fact, always has the effect of subtracting "1" from the number to which it is applied, and forms the basis of the operation of the unit Subtractor. The details of the Unit Subtractor are shown in Figure 6.3. The connection marked "from Trigger S" is associated with the double transfer operation and may be ignored for the moment. The Instruction word emerges from the TS COUNT delay element in wide-pulse form; the points "J" and "N" both carry narrow-pulse words, at "J" the Instruction word and at "N" the same word negated. This clock-pulse gate is the normal one in the TS COUNT circulation unit. The signal emerging at "B" will be the "J" signal if Trigger CARRY is off and the "N" signal if it is on. The word "J" is thus returned unchanged to "K", except that those digits which occur while Trigger CARRY is on are negated. Trigger CARRY is stimulated by very narrow pulses of signal which mark the back edges of Q16 and Q25. It is cleared at the end of any microsec in which a digit "1" appears at "J". Figure 6.4 shows the outputs from CARRY and at "B" in response to an input word at "A" whose Wait and Timing numbers are 28 and 2 respectively; 1 has been subtracted from both W and T. The output from CARRY includes neither Q22 nor Q31, so there is no output from "C" or "D". "C" gives an output only if the signal from CARRY extends to cover Q22, which means that all the five Wait number digits at "A" must be zero. This occurs in m.c. m+W+1, where the original Instruction entered TS COUNT in m.c. "m" and had Wait number "W". The subtraction process continues, and the W section of the word at "A" is again zero after a further 32 unit subtractions, giving a second pulse of signal at "C". The output at "C" is thus P22 in m.c. m+W+1, and in m.c. m+W+1 of every subsequent Major Cycle until the word in TS COUNT is replaced by the next Instruction. Very often, the Instruction is replaced before the second signal is due at "C" which then gives only one pulse for each Instruction. Similarly, the output at "D" is P31 in m.c. m+T+1, of every Major Cycle until the Instruction is replaced. Figure 6.5 shows the operation for zero Wait and Timing numbers at "A", though these, in practice, occur in the same minor cycle only if the original W and T were equal. The Timing number at "J" now provides no signal to clear Trigger CARRY, which is therefore extinguished by the front edge of a Q32, to prevent its remaining on and negating Go digit and possibly part of the NIS number. Trouble would also arise from a pulse at P16 or P25 time at "J", which would try to clear Trigger CARRY just at the moment when other pulses were arriving to stimulate it. This is avoided by removing any such digits by an inhibitor gate. NS-y-37/11-57

Page 31

THE INSTRUCTION STATICISER The signal from "E" is used to select the required NIS, S and D gates. It is first taken to a set of 14 circuits called the "Instruction Staticiser". The output at "E" is therefore usually called the "IS" signal. The Instruction Staticiser, shown In Figure 6.6, may be des- cribed as a negated version of part of the Output Staticiser. Its output is a parallel version of 14 digits of the word in TS COUNT. In the Output Staticiser, the "Clear OS" signal puts all the OS triggers off, and individual ones are put on by pulses at the appropriate time in the OS input word. In the Instruction Staticiser, on the other hand, the "Clear IS" signal puts all the IS triggers on, and individual ones are put off by pulses at the appropriate time in the IS input word from "E". The "Clear IS" signal is a short pulse at the end of the TCI signal; it therefore occurs just as a new Instruction has finished entering TS COUNT but before it emerges in negated form at "E". Suppose, for example, that this new Instruction has NIS number "6", meaning that its 2nd, 3rd and 4th digits are 0, 1, 1 respectively; the corresponding digits at "E" are 1, 0, 0. The IS signal has a pulse in Q2 time, which clears Trigger IS2, but not during Q3 or Q4; triggers IS3 and IS4 thus remain on. The next 11 digits, up to the 15th, are staticised in the same way; this process takes place during the set-up minor cycle, at the end of which, the IS trigger outputs give the static equivalent of the "Address" section (digits 2 to 15) of the word in TS COUNT. The (negated) word in TS COUNT appears repeatedly on IS, but the IS triggers are unaffected after the first time; the subtracting process does not affect the Address section so that the pulses are merely applied to the "Clear" input of triggers which are already off. The pulses are inhibited while TCI signal is applied to let the next Instruction into TS COUNT; the reason for this will become clear when we consider the discrimination facilities. THE EXTERNAL TREE The outputs of the first 14 IS triggers (IS2 to IS15) may be replaced with signals from 13 "IS Keys" and a "Characteristic Key" on the Control Panel. This is done by pressing another key on the Control Panel called "External Tree". SELECTOR TREES (FUNCTION) 13 of the IS trigger outputs are taken in groups to three "Selector Trees" represented in Figure 6.7 by blocks. The IS2, IS3 and IS4 signals, for instance, go to the NIS Selection Tree; this then gives an output on one of eight possible output lines. Which of the output lines is chosen NS-y-37/11-57

Page 32

at any given time is determined by the particular one of the eight pos- sible binary configurations then being applied at the three IS input lines. The Source and Destination Selector Trees are also shown as blocks, each having five IS input lines and 32 possible output lines. Their operation is more complicated than that of the NIS Tree, and some further explanation will be given at the end of the description of Control. The output of trigger IS15, representing the first digit of the Characteristic number, is taken, not to a Selection Tree, but to the Section of Control governing the operation of Transtim. TRIGGER R AND Q The N, S and D numbers of the Instruction word determine the IS trigger settings, which in turn control the three Selector Trees. The Wait and Timing numbers determine the minor cycles in which signals occur at "C" and "D"; these signals, in turn. control the operation of TT and TCI. In the first place, the signals at "C" and "D" operate two triggers, Trigger R and Trigger Q, as shown in Figure 6.8. Trigger GO, also shown in the diagram, will be assumed to be permanently on; its operation will be ignored for the moment. The output of the two triggers is shown in Figure 6.9 which also gives, for comparison, the required TT and TCI signals. Trigger GO being on, Trigger R is stimulated by the first pulse of signal at "C", which occurs at P22 of m.c. m+W+1; Trigger Q is stimu- lated by the first pulse of signal from "D" after Trigger R has been put on. If T is less than W, the first signal at "D" has no effect, and Trigger Q comes on at P31 in m.c. m+T+33; otherwise, at P31 in m.c. m+T+1. If T and W are equal, the two triggers are stimulated at P22 and P31 in the same minor cycle (except, as we shall see, in the case of a double transfer). Trigger Q stays on for less than one minor cycle, being stimulated at P31 and cleared at the beginning of the next Q22 signal. Trigger R is also cleared at this time, by a short pulse occuring at the end of the signal from Trigger Q. The output of Trigger R governs the generation of the Transtim signal; it is also used in the Discrimination facilities, which have yet to be described. The output of Trigger Q governs the generation of TCI. TRIGGERS S, P AND TT Figure 6.10 shows the part of Control which generates the Transtim signal. The signals from the various triggers are given in Figure 6.11. There are three possible modes of operation. depending on whether the Transfer is to be Long, Single or Double. NS-y-37/11-57

Page 33

In all three cases, Trigger P comes on at the same time as Trigger R. In a Long Transfer there is a signal from Trigger IS15, and Trigger P remains on until it is cleared by a short pulse at the end of the signal from Trigger R. The outputs of Triggers R and P are thus identical. Trigger TT is controlled by short pulses of signal at P32 time; its output is passed through a delay network of 0.5 microsec, so that the final output exactly spans one or more minor cycles. The point of this arrangement is that the 0.5 microsec delay can be shortened to compensate for any stray delays in the subsequent circuits. TT is stimulated by the first of these P32 signals after Trigger P comes on and cleared by the first one after Trigger P goes off. In the case of a Long Transfer, Trigger TT comes on at the end of m.c. m+W+1 and goes off at the end of m.c. m+T+2. In both Single and Double Transfer Instructions, the Characteristic is even, the 15th digit is "0" and IS15 is cleared by the IS signal and remains off throughout the operation. As we shall see, this means that a Q14 signal is released from gate "F" to clear Trigger P in either the first or second minor cycle after it is stimulated. The distinction between Single and Double Transfer Instructions is determined by Trigger S. This has the function of staticising the 16th digit of the Instruct on, but it differs in two respects from a normal IS trigger. Firstly, it is cleared by CIS and stimulated by a P16 pulse from "J" instead of being stimulated by CIS and cleared by a P16 pulse from "N"; secondly, instead of remaining on until the next Instruction enters TS COUNT, it is cleared in the coarse of interpreting and obeying the current Instruction. A point to note is that any P16 digit at "J" is inhibited in the Unit Subtractor at its first appearance, and makes no further attempt to stimulate Trigger S; once this is cleared, it there- fore is not restimulated until the arrival in TS COUNT of another Double Transfer Instruction. The detailed operation of the three types of Instruction will now be described. LONG: m.c. m+W+1 :- P comes on with R at P22; TT comes on at P32. m.c. m+T+1 :- Q comes on at P31. m.c. m+T+2 :- P goes off with Q and R at Q22; TT goes off at P32. SINGLE: m.c. m+W+1 :- P comes on with R at P22; TT comes on at P32. m.c. m+W+2 :- P goes off at Q14; TT goes off at P32. NS-y-37/11-57

Page 34

DOUBLE: m.c. m+W+1 :- as before. m.c. m+W+2 :- Q14 from gate "F" is inhibited by Trigger S; S goes off at Q19. m.c. m+W+3 :- P goes off at Q14; TT goes off at P32. It will be seen that Trigger S is always cleared before the CIS signal arrives at the end of m. c. m+T+2, the minor cycle of TCI. The CIS connec- tion is, in fact, necessitated only by the operation of the Discrimination facilities. A connection is taken from Trigger S to inhibit the signal from D which stimulates Trigger Q. If Trigger S is on, this prevents Triggers R and Q coming on in the same minor cycle, as required for a double transfer with equal Wait and Timing numbers. CONTINUOUS TRANSTIM Pressing a key on the Control Panel labelled "Cont T.T." injects a signal connected to the output of Trigger P. This causes TRANSTIM to come on at the next P32 and to stay on. The result is continuous transfer between the selected Source and Destination. PbD6 It is required for various purposes around the Machine to have a short signal which occurs a little before the beginning of Transtim. This is provided by taking a connection from Trigger P through a beginning element and a delay of 6 microsec (see Figure 6.10). The result is a brief pulse of signal at about P28 time in the minor cycle immediately preceding the first minor cycle of Transtim; this is known as "Trigger P (beginning) delayed 6 microsec", or PbD6 for short. It is used in Destination Triggers and a device called "Control-Magnetic Interlock" (CMI) which will be des- cribed in the next paragraph. CONTROL-MAGNETICS INTERLOCK In the chapter on the Magnetic Store, it will be found that any operation involving the Magnetics occupies at least 13 millisec. To save time, it is arranged that each such operation is initiated by an Instruc- tion obeyed in Control and then proceeds to completion under its own steam, leaving the rest of the DEUCE free to do any other sequence of operations required by the computation in hand. However, this method has the snag that while this first Magnetic operation is still in progress the program may proceed as far as a second Instruction intended to initiate a Magnetic operation, with the result that the Magnetics would be required to do two things at once, which it cannot. To avoid this trouble, the second Instruction is held NS-y-37/11-57

Page 35

suspended in TS COUNT until the completion of the first Magnetic operation, and the Program proceeds no further until this time. Let us state the requirements ware precisely: whenever (a) a Magnetic operation is in progress and (b) the Instruction about to be obeyed would initiate a further Magnetic operation then this Instruction is not obeyed but is held over until the completion of (a). The information (b) that a Magnetic operation is about to be called is taken into the Magnetics organisation by connections from the IS Triggers; here, it is combined with the information (a) that a Magnetic operation is already in progress to generate a warning signal which is taken to Control on a line called "Control-Magnetics Interlock" or CMI. The circumstances and circuits in which CMI signal is generated will be described in the chapter on Magnetics; these circumstances will be seen to be a little more complicated than has yet been indicated. Here we are concerned only in the action of CMI signal in suspending the operation of Control. The connections are shown in Figure 6.12. It will be remembered that PbD6 signal occurs at about Q28 time in m.c. m+W+1; if CMI signal is present, this PbD6 signal (gated with Q28 to fix the timing precisely) is used to clear Trigger R. Trigger P is in turn cleared by the end element connecting it with Trigger R; furthermore, Trigger Q never comes on, since Trigger R goes off at Q28 time and the earliest time at which Trigger Q could be simulated is at P31 in that minor cycle. The system then behaves as though Trigger R had never been stimulated, and waits for the next signal from point C, a Major Cycle later, to stimulate Trigger R again. Unless CMI has ceased by then, the second attempt will also be abortive. Only when the current Magnetic operation has finished and CMI come to an end, will a pulse from point C be allowed to bring Control into normal operation in obeying the Instruction which has up to then been circulating vainly in TS COUNT. It may not be clear why PbD6 Is needed at all; the operation des- cribed above could have been equally well achieved by taking CMI signal directly to clear Trigger R. However, with this arrangement an Instruc- tion initiating a Magnetic operation would always need equal Wait and Timing numbers, an irksome restriction for the programmer. The point is that as soon as Transtim comes on for such an Instruction, the Magnetic operation starts; since the Instruction at that time on the IS Triggers is one specifying a Magnetic operation, CMI signal starts immediately. If this were allowed to clear Trigger R by itself, Trigger Q would never NS-y-37/11-57

Page 36

come on to initiate TCI signal and call in the next Instruction; the only way round this would be for Trigger Q to have already come on before the start of Transtim, and this requires equal Wait and Timing numbers. The introduction of PbD6 gets over this difficulty, since the PbD6 signal always occurs before the start of Transtim and thus before the start of the CMI signal due to the Instruction which itself initiated the current Magnetic operation. The connection marked "Request Stop" in Figure 6.12 will be explained later. TRIGGER TCI Figure 6.13 shows the connections from Trigger Q to Trigger TCI, and the output signals of the two triggers. Trigger D, also shown in the diagram, is associated with the Discrimination facilities; for the present, it will be assumed to be always off. With this assumption, the relation between Triggers TCI and Q is exactly the same as that between Triggers TT and P except that the operating signal comes at the back edge of Q32, not at P32. Trigger TCI comes on at the end of the minor cycle in which Q is stimulated, and goes off at the end of the minor cycle in which Trigger Q is cleared. These two minor cycles, m+T+1 and m+T+2 are adjacent, so that TCI stays on for only one minor cycle, m+T+2 as required. CONTINUOUS TCI A key on the Control Panel labelled "Cont TCI" injects (when depressed) a continuous signal at the output of Trigger Q. This causes TCI to commence at the next Q32 (back) and to continue. TRIGGER GO (FUNCTION) From Figure 6.8 it is clear that if Trigger GO is off the signal from "C" will fail to stimulate Trigger R, and that this in turn will prevent the "D" signal from stimulating Trigger Q. Transtim signal is not applied to carry out the wanted Transfer, nor does TCI signal arrive to let the next Instruction into TS COUNT. The present Instruction remains in possession, and pulses emerge every Major Cycle from "C" and "D", ready to do their jobs as soon as a signal arrives from Trigger GO. When Trigger GO is finally stimulated, the Instruction is obeyed; all the minor cycles of action are correct, but everything happens a fixed number of Major Cycles after it would otherwise have occurred. Since the only effect of Trigger GO is on the signal from "C" which occurs at some P22 time, the state of the trigger at any other time in a minor cycle is immaterial. It will be seen that Trigger GO is cleared in the course of obeying each Instruction, and has to be stimulated by some means for each succeeding Instruction before it can be obeyed. NS-y-37/11-57

Page 37

Trigger GO, with the associated Trigger STOP is used to influence the action of Control from outside by means of three of the keys on the Control Panel (and also by means of operations of the Punch and Reader, as will be seen). The P32 or "go" digit of the Instructions is also concerned. One of the Control Panel keys, the "Stop key". has three positions called "Normal", "Stop" and "Augmented Stop". In the Normal position a digit "1" in the P32 position of an Instruction entering TS COUNT is allowed to stimulate Trigger GO. In a sequence of such Instructions, Trigger GO will be stimulated once for each, and operation will be normal as already described until an Instruction is reached whose P32 digit is zero (called a "Stop Instruction" or "Stopper"). This Instruction stays in suspended operation until a stimulus, called a "Single-Shot", is supplied from outside to stimulate Trigger GO. With the Stop Key In the Stop position, the P32 digit of the Instruc- tion is no longer allowed to stimulate Trigger GO. As a result, all Instructions are treated as Stop Instructions, and a Single-Shot signal must be given for each. The Augmented Stop position of the Stop Key again inhibits the action of the GO digit; it also brings the STOP Trigger into play. This trigger is now stimulated by CIS signal at the start of obeying every Instruction; it is cleared by the Go digit of a Go Instruction, but left on if the Instruction is a "Stopper". While the Stop Trigger remains on, Single-Shots are ineffective, and can no longer stimulate Trigger GO; neither the current Instruction nor any of its successors can be obeyed until Trigger STOP has been cleared. This can be done only by pressing the second of the three Control Panel keys concerned, the "Release Key". The net result of the Augmented Stop position is that a sequence of Go Instructions may be obeyed, as in the Stop position, by supplying a Single-Shot for each. As soon as a Stopper is reached, the Machine seizes up and will do nothing. The Release Key must be pressed before a Single- Shot will be effective in causing the Stopper to be obeyed. The third Control Panel key supplies the Single-Shots; it can be moved either up or down from its normal centre position. Pressing the Single-Shot Key once gives one Single-Shot. Raising the key starts a succession of Single-Shots at the rate of about ten a second. If the Stop Key is in its Stop position, this gives operation at about one two- hundredth of normal speed. Single-Shots alternatively come from the Reader or Punch whenever a card is passing. In either case, one Single-Shot is emitted each time a row of the card comes level with the reading brushes or punching knives. There are thus twelve Single-Shots for each card which passes through the Reader or Punch. This facility is used, in effect, to slow the DEUCE to the speed of a Hollerith machine when reading or punching numbers. To NS-y-37/11-57

Page 38

punch twelve numbers in binary form on a card, for example, the twelve Instructions transferring these numbers to D29 are all made Stoppers. Each of them remains suspended in TS COUNT till a card row comes into position, when a Single-Shop signal causes it to be obeyed. punching the number transferred on to the card. The DEUCE then proceeds at full speed to the next Stopper and then waits for the next row of the card. CONNECTIONS TO TRIGGERS 'GO' AND 'STOP' The connections are shown in Figure 6.14. The P32 digit of the Instruction is taken from the normal NIS Gate of TS COUNT to stimulate Trigger GO and from the normal Source Gate to clear Trigger STOP. In all other circulation units, Source Cathode signal (and NIS Cathode signals where the NIS Cathode is used at all) is permanently applied so that only the selection of the appropriate Source (or NIS) number is needed to bring the gate into operation. In this case, however, these signals are applied only at Q32 time, and can operate only to release the P32 digit on to HWE or IHW respectively. The actual operation of the two gates is done by direct connections from the Stop Key to the points where the signals from the NIS and Source trees respectively are normally applied. With the key at Normal, the NIS Gate is always operated and lets every Go digit through to stimulate the GO Trigger; in the Augmented Stop position the Source Gate releases every P32 digit in an Instruction to clear Trigger STOP. When the key is at Stop, neither gate is operated. The connection from the Augmented Stop position to the Source Gate, by the way, has no operational justification; it could equally well be replaced with a permanently applied signal. The arrangement adopted, however, permits a simplification in the electronic realisation of the logical diagram. The point is that the same Q32 signal is used alter- natively to operate the NIS Gate (Normal position) to do nothing (Stop position) or to operate the Source Gate (Augmented Stop position). If this signal were used permanently in the Source Gate whatever the position of the Stop Key, a second Q32 signal would have to be supplied to operate the NIS Gate in the Normal position. (These remarks can be fully under- stood only by reference to the electronic circuits concerned). For any Instruction to be obeyed, Trigger GO must be stimulated, either by a Go digit or by a Single-Shot. At the end of obeying each Instruction, Trigger GO is cleared by a Q16 in the TCI minor cycle, the minor cycle in which the next Instruction enters TS COUNT. This is necessary in case the next Instruction is a Stopper or the Stop Key is in the Stop or Augmented Stop position. It also has the effect of prevent- ing Transtim during the Set-up minor cycle which immediately follows that of TCI. Figure 6.15 shows the relevant signals. Trigger Q is cleared at Q22 in the TCI m.c., clearing Triggers R and P (if it is still on) at the same time. Trigger R cannot immediately be stimulated by any signal at point C because Trigger GO is now off. Trigger R is therefore still off at the end of this minor cycle, and Trigger TT is then cleared; TT NS-y-37/11-57

page 39

cannot be restimulated until the next P32 time, which occurs at the end of the Set-up minor cycle. The Go digit is taken to Trigger GO from the NIS Gate which comes after the Destination Gate, rather than from the Source Gate which comes before it because Trigger GO would otherwise be stimulated by the Go digit of the previous Instruction. Furthermore, this arrangement avoids wasting a Major Cycle in the operation of a Go instruction with zero Wait number. For such an Instruction, the first signal from point C occurs while the Instruction word is emerging from TS COUNT for the first time (the Set-up minor cycle). If Trigger GO were not stimulated until the end of this minor cycle, the first opportunity of stimulating Trigger R would be lost. As things stand, Transtim signal starts immediately at the end of the Set-up minor cycle. It would appear at first sight that it does not matter at which point in the minor cycle a Single-Shot arrives to stimulate Trigger GO. It would be unfortunate, however, if this signal arrived between P16 and P22 in the TCI minor cycle, for this might allow Trigger R to be stimulated at P22 in this minor cycle, which would cause Transtim signal to occur during the Set-up minor cycle, while the Source and Destination numbers were changing. All this would only happen, of course, if a Single-Shot were applied while the Machine was doing a sequence of Go instructions with the Stop Key at normal; while this contingency is unlikely, it could arise and must be provided for. The provision made is to arrange that a Single-shot, at whatever time it originates, can supply a pulse to stimu- late Trigger Go only at Q32 time. This is the object of the two triggers shown in the path from the point SS (the Input of Single-Shot signals from outside) to Trigger GO. The detailed operation of these will be described in the Circuit Manual, since the reason for having two triggers rather than only one is purely electronic. It has been said that the connection from the Augmented Stop position of the Stop Key to the TS COUNT Source Gate is irrelevant; the effective connection from Augmented Stop is the one which permits CIS signal to stimulate Trigger STOP just as each successive Instruction has entered TS COUNT. If this is a Go instruction, its P32 digit will come out of the Source Gate to clear Trigger STOP; the action from then on will be just as though the key were in the Stop position. If, however, the Instruction is a Stopper, the Single-Shot signal cannot get through to stimulate the GO Trigger until Trigger STOP has been cleared by pressing the Release Key. More accurately, the STOP is cleared when the Release Key is allowed to return to its normal position; otherwise, if a stream of Single-Shots were being applied, several Stop Instructions might be obeyed in the Interval between pressing the Release Key and releasing it. It will be noticed that Trigger STOP is not cleared by a Go digit until the end of the Set-up minor cycle, This cannot cause any waste of time because two successive Single-Shots are never closer together then NS-y-37/11-57

Page 40

about 15 millisec (the interval between successive rows of a card passing through the Reader). The complete result of an effective Single-Shot, carrying out one current Instruction and taking the next into TS COUNT, can never occupy more than three Major Cycles, The GO and STOP Triggers each operate a lamp on the Control Panel which shows whether they are on or off. DISCRIMINATION FACILITIES The input arrangements to Trigger D, which are shown in Figure 6.16 incorporate two special Destinations, D27 and D28. An Instruction using either of these Destinations may cause Trigger D to be stimulated during the course of the Transfer; this will have the effect of modifying the action of Trigger TCI, so that it is no longer exactly as has been described. Assuming, for the moment, that there is no input signal at either "DN" or "DF", the digits appearing on HWL will always he applied effectively to gate K. If D28 is used, any signal on HWL during the Transtim period will pass through gate K to stimulate Trigger D. In other words, a sequence of numbers transferred to D28 will have no effect if they are all zero, but will stimulate Trigger D if any of them contains a digit "1". The action of D27 is similar, but In this case, Transtim signal has to pass through gate L, and reaches gate K only at Q32 time of every minor cycle for which it is applied. A sequence of numbers sent to D27 will stimulate Trigger D if, and only If, the 32nd digit of one or more of the numbers is a "1". In the Signed convention, this means that D is stimu- lated if any of the numbers is negative, but not if they are all positive. DN and DF are connections from a control panel key. Raising this gives signal on DF and ensures that Trigger D will not be stimulated by any transfer to D27 or D28. Lowering the key gives signal on DN and ensures that any transfer to D27 or D28 will stimulate Trigger D. The key is used in program testing. EFFECT OF TRIGGER 'D' Figure 6.17 shows the output signals of Triggers R, Q, D and TCI at the end of an Instruction using D27 or D28. The full and dotted lines give respectively the cases where Trigger D has and has not been stimu- lated. In both cases, Trigger Q comes on at P31 in m.c. m+T+1, and goes off, together with Trigger R, at Q22 in m.c. m+T+2. Trigger D is cleared by the first Q19 signal after Trigger R is cleared, that is at Q19 in m.c. m+T+3. Trigger TCI is stimulated at the end of the first Q32 signal after Trigger Q comes on, that is at the end of m.c. m+T+1. At the end of each NS-y-37/11-57

Page 41

subsequent minor cycle, since Trigger Q is now off, a pulse signal is applied to gate M (Figure 6.16), with the intention of clearing Trigger TCI. If Trigger D is off, this succeeds at the first attempt, giving the normal operation already described; when Trigger D has been stimulated during the Transfer, however, it is not cleared till midway through m.c. m+T+3; it therefore inhibits the first of the signals at gate M and TCI is not cleared until the end of m.c. m+T+3. Trigger D has no effect on the operation of Trigger TT, or on the IS triggers. Thus the final effect of these facilities is that if a non-zero number is transferred to D28, or a negative one to D27, TCI is applied not only for its normal period of one minor cycle, but also for the minor cycle immediately following. EXTRA MINOR CYCLE OF TCI Each Instruction specifies its successor by means of its NIS and T numbers. Normally, this is determined uniquely, and the next Instruction is the word stored in m.c. m+T+2 of DL"N". This word, which we shall call "NIA", is let into TS COUNT by the application of TCI signal for the minor cycle m+T+2, at the end of which the TCI gate is closed, trapping the word NIA in TS COUNT. When as the result of an Instruction using D27 or D28, Trigger D is stimulated during the Transfer, TCI signal is applied also for the succeed- ing minor cycle, m+T+3. During this second minor cycle, the successive digits of NIA emerge from TS COUNT, return to the TCI gate, and are inhibited; meanwhile, entering TS COUNT are the digits of the word stored in m.c. m+T+3 of DL"N", which will be called "NIB". When TCI ends, therefore, the word trapped in TS COUNT is not NIA but NIB. An Instruction which transfers a number to D28, thus has the function of choosing between two possible Instructions to succeed it. If the word being transferred is zero, the next Instruction is NIA, the word stored in DL"N", m.c. m+T+2; if the word transferred is non-zero, the next Instruction is NIB, the word stored In DL"N", m.c. m+T+3. For instance, the Instruction "16-28" will be followed by different succeeding Instruc- tions depending on whether or not the number in TS16 is zero. PRECAUTIONS It is intended that the effect of an Instruction which stimulates Trigger D shall be simply to add one to the effective value of the Timing number, as far as it concerns the selection of the next Instruction. In other words, NIB is to be taken as the next Instruction, and NIA is to be completely ignored. However, NIA actually enters TS COUNT, and emerges from it, in m.c. m+T+3, into the circuits which interpret Instructions and generate the required signals. In order to achieve the required result, some special precautions must be taken to ensure that no part of NS-y-37/11-57

Page 42

NIA is obeyed as an Instruction as it emerges from TS COUNT. During m.c. m+T+3, the successive digits of NIB are flowing from the NIS gate of DL"N" along IHW to the TCI gate, and entering TS COUNT. If the digits of NIA, at that time emerging at "N", were permitted to affect the IS triggers, they might alter the selection of the NIS gate, replacing part of NIB with the word in the corresponding minor cycle of a different Delay Line. The fact that TCI signal is still present is therefore used to inhibit the digits at "N" before they can be used to generate the IS signal (see Figure 6.6). If the Go digit of NIA were "1", it would stimulate Trigger GO, in spite of the fact that NIB might be a Stop Instruction. If the Wait Number of NIA were zero, a pulse would emerge at "C" during m.c. m+T+3, which would tend to stimulate Trigger R. Both these points are met by the fact that, since TCI is still on, Trigger GO is cleared at Q16 in that minor cycle. (see Figure 6.14). This leaves NIB to restimulate GO, or not, depending on the value of its Go digit; it also prevents the pulse (if any) at "C" from stimulating Trigger R, since this signal can occur only at P22 time, when Trigger GO will be off. Again, the P16 digits of NIA and NIB might be "1" and "0" respective- ly; Trigger S would be stimulated by NIA passing through Control, and must be cleared somehow to allow NIB to operate properly. This is done by the CIS clearing connection to Trigger S (Figure 6.10) which leaves Trigger S always off at the end of TCI signal, that is at the moment when the Instruction actually to be obeyed has finished entering TS COUNT; this Instruction then sets Trigger S according to its own P16 digit. SELECTOR TREES The function of a Selector Tree has already been described. Any further explanation of the NIS Tree will be left for the Circuit Manual. Each of the other two Trees, however, really consists of two Selector Trees of this type: the HWE and TT connections are, in fact, more complex than has yet been shown, though their function has been accurately represented. SOURCE SELECTOR TREES AND HWE The details of the HWE connections and the two Source Selector Trees are shown in Figure 6.18. The HWE points from the 32 Source gates, pre- viously shown as all connected together, are really connected in four groups of eight; the HWE points from S0 to S7 are connected to HWE0, those from S8 to S15 are connected to HWE1, those from S16 to S23 are connected to HWE2, and those from S24 to S31 are connected to HWE3. Similarly, the SC connections are also made in four groups of eight, these connection points being called SC0, SC1, SC2 and SC3. Of the five IS triggers corresponding to the Source number of the current Instruction, NS-y-37/11-57

Page 43

the first three are connected to the First Source Selector Tree, and the last two to the Master Source Selector Tree. Each of these Trees always gives an output signal on just one of its eight or four possible output lines, depending on the binary number represented by the signals supplied from the IS triggers. Each of the eight output lines from the first tree is connected to four Source gates, one in each group; thus HWE0, HWE1, HWE2 and HWE3 each carry a sequence of digits from one of the Sources in its group. Each is presented at one of four Master Source gates, one of which is opened by a signal from the second tree to release the corres- ponding signal into the main Highway. As an example, suppose the Source number in the current Instruction is 23, represented by the sequence of pulses 11101. The first three digits go to the first tree, giving a signal on the output line connected to S7, S15, S23 and S31. All these Source gates are opened, the signal from S7 (the words in DL7) appearing an HWE0, that from S15 (TS15) on HWE1, that from S23 (TS14 ÷ 2) an HWE2, and that from S31 (ones) on HWE3. The last two digits of the Source number are applied to the second tree, which gives a signal on the output line connected to Master Source gate 2, allowing the pulses on HWE2 to pass to the main Highway. Thus the setting of the number "23" on the IS triggers carrying the Source digits releases the signal at Source gate 23 on to the main Highway, the same result as achieved by the simpler system shown before. The more complicated system is used because it gives more reliable operation in practice. However, there is now no single line carrying a signal which can truly be called "S23". In future the selector signal will be called, for example "S7(23)", since only the simultaneous application of signal at "S7" and at output "2" of the Master Scarce Tree will release the signal from "Source Gate 23" on to Highway. DESTINATION TREES AND TRANSTIM A typical Destination gate is shown in Figure 6.19, as a reminder; the dotted connections refer to storage positions, where the Destination gates act as changeover switches. The "TT" points of all 32 gates were previously shown joined together; in practice, however, these points are joined only in four groups of eight. The arrangement, similar to the HWE connections to Source gates, is shown in figure 6.20. The inputs from Triggers IS13 and IS14 determine to which of the lines TT0. TT1, TT2 and TT3 Transtim signal shall be routed when it appears. If the Destination number of the current Instruction is 13, for example, Destination Selection signals are applied to the Transtim gates of D5, D13, D21 and D29; when Transtim signal is applied, it is routed to the line TT1 and opens only the gate of D13. Again, the new notation will now be adopted of calling the Destination selection signal, for example, "D5(13)". NS-y-37/11-57

Page 44

PROGRAM DISPLAY Two special facilities are provided for testing new Programs. One of these is called Program Display; it involves connections to Control, Trigger PUNCH and the Output Staticiser (D29). The circuit is shown in Figure 6.21. Trigger H, which is stimulated by CIS at the moment when each new Instruction has finished entering TS COUNT and is about to start emerging at "J", is a special type of trigger which automatically clears itself a fixed time (in this case, about 40 microsec) after it has been stimulated. The return path through the 40 microsec delay has been inserted for logical completeness, and has no particular electronic equivalent. The signal from Trigger H covers the minor cycle while each Instruction first emerges from TS COUNT, and part of the next m.c. The digits covered in the second m.c., however, are identical with those in the first, since Trigger H clears itself before the second appearance at "J" of P16, the first digit affected by the Unit Subtractor. The output of gate "P" is thus a copy of each successive Instruction, just as it entered TS COUNT, with a second copy of the first few digits. Normally, this does not pass gate "Q", and has no effect on the operation. There is a key on the Control Duel labelled "Program Display"; if this key is down and the Stop Key is in the Augmented Stop position, a signal is applied at the point marked "PD". This signal has three imme- diate effects. Firstly, it stimulates Trigger PUNCH, so that cards run continuously through the Hollerith Punch; this provides a Single-Shot signal as each row of a card passes the punching station, causing succes- sive Instructions to be obeyed only in time with the successive rows (since we are at Augmented Stop). Secondly, it inhibits any words which might be sent to D29 by an Instruction from reaching the OS and being punched; such an Instruction is therefore "obeyed" in its turn, but has no practical effect. Finally, it sends to the OS the signal from gate "P", which consists of a copy of each successive Instruction in the order in which they are obeyed; the second copy of some of the digits has no effect, tending merely to restimulate those OS triggers put on by the first copy. The complete effect of the "Program Display" key is that the program is carried out normally, but at a speed determined by the Hollerith Punch. Instead of displaying or punching any results of the computation, however, all the Instructions are punched in the order in which they are obeyed. It is arranged that when the STOP Trigger comes on it inhibits the action of the Program Display Key. Thus when a Stopper is reached in the course of doing Program Display, the Punch stops and no further progress is possible until the Release Key is pressed and Program Display restimu- lated. REQUEST STOP (FUNCTION) The second special facility for testing new programs is called Request Stop. When in use, is causes the computer to stop automatically NS-y-37/11-57

Page 45

as soon as an instruction enters TS COUNT which has a previously specified Source, Destination or NIS number, or any combination of these. Different settings of keys, for example, will cause the computer to stop as soon as it reaches an instruction with NIS 5 (S and D irrelevant) or an instruction "13-27" (NIS irrelevant). The operation of Request Stop involves additional functions of the External Tree key and the 14 IS keys and three special Request Stop keys labelled "NIS", "S" and "D" respectively. Request Stop is brought into action by raising the External Tree key and pressing the appropriate selection of the three special keys; the selected NIS, Source and Destination numbers will be those currently set on the IS keys. Thus, if the IS keys are set at "5, 13-27", the relationship between the form of the stopping instruction and the setting of the Request Stop key is as follows ("n, 13-d", for instance, means that the computer will stop as soon as it reaches an instruction with Source number 13, independent of the NIS and Destination numbers):- Request Stop keys down Stops at first instruction of the form Source only n, 13 - d Destination only n, s - 27 NIS only 5, s - d Source and Destination n, 13 - 27 NIS and Source 5, 13 - d NIS and Destination 5, s - 27 All three 5, 13 - 27 Thus, if one key is already down, pressing a second and a third makes the computer less likely to stop, since it increases the speciality of the instruction form needed to stop it. If none of the three Request Stop keys is down, the computer will not stop, even though the External Tree key is in the up position. It world perhaps be more correct to describe the computer as "inter- locked" rather than "stopped" by Request Stop. Trigger GO remains on, and action is suspended only so long as conditions for stopping are maintained; if the relevant IS keys are moved, or External Tree key returned to normal, the computer immediately proceeds. REQUEST STOP (MECHANISM) Request Stop works by injecting a signal at the CMI input to Control NS-y-37/11-57

Page 46

whenever conditions for stopping are fulfilled. While the signal is present, Trigger R is stimulated every major cycle and cleared 6 microsec later at PbD6 time, before Trigger TT or Trigger Q has had time to come on. The instruction in suspense is thus not obeyed until the Request Stop conditions are removed. However, it will be seen in the next chapter that the Destination Triggers functions are operated by PbD6, and not by TT. It is therefore unsound to interlock on an instruction with Destina- tion number 24 (Destination Triggers), since the instruction would be repeatedly obeyed, once every major cycle, while waiting in TS COUNT. The connections for Request Stop are Shown in Figure 6.22. If External Tree key is up and one or more of the Request Stop keys down, a signal is injected at the CMI input to Control unless it is inhibited by non-fulfilment of the relevant condition. The state of the IS triggers is sampled by a set of 14 not-equivalent gates; each of these gives out a signal if the corresponding IS trigger and key are in opposite states. The first three of these signals are combined in a one-gate, which thus gives a signal at point N unless the instruction in TS COUNT has a NIS number equal to that set on the first three IS keys. Similarly, there is a signal at points S and D respectively unless the Source and Destination numbers in TS COUNT correspond with those on the IS keys. The three signals at points N, S and D are switched by their respec- tive Request Stop keys into a common one-gate, which thus gives a signal at point R if there is any discrepancy in the selected parts of the instruction between the word in TS COUNT and the IS keys. If the External Tree key is up and one or more of the three Request Stop keys is down, a signal is generated at Point S. This signal passes to the CMI input to Control unless it is inhibited by a signal at Point R. Thus, to sum up, a signal is injected at the CMI input to Control if, and only if, there is complete agreement between TS COUNT and the IS keys over the selected portions of the instruction word. The inhibiting action of a signal at the CMI input to Control has already been described in the paragraph on Control-Magnetics Interlock. COMPLETE DIAGRAM OF CONTROL Figure 6.23 gives a complete logical diagram of Control excluding the IS Triggers, the Selector Trees, and the detailed Request Stop arrangements. NS-y-37/11-57

Page 47

DESTINATION TRIGGERS

D24 is used for various assorted operations about the Machine which have in common only the fact that none of these operations requires the transfer of information through the Highway. The connections are shown in Figure 7.1. In contrast with all other Destination Gates, D24 operates, not on Transtim, but on the brief PbD6 signal which occurs shortly before the start of Transtim. The object of this is to ensure that, in spite of any accidental circuit delays, Triggers MULT and DIV are always brought on at least by the beginning of the minor cycle in which the Instruction stimulating them is officially obeyed. Since Transtim is not used, a dummy D24 Destination Gate is inserted to provide an alternative path for the Transtim signal, which would otherwise divide itself among other Destination Gates (see circuit manual for precise operation of Trees and Gates). Which of the twelve possible operations is required is specified by the Source number of the Instruction, that is by the setting of the IS Triggers corresponding to P5, P6, P7 and P8 (P9 is not used, since the twelve operations required can all be accommodated within the first 16 Source numbers). The PbD6 signal gated by D24 is first routed to one or other of two groups of 2-gates, according to the state of IS8, to the group of eight numbered 0 to 7 if the P8 digit is “0” and to the group of four numbered 8, 9, 10 and 12 if the P8 digit is “1”. The Instruction "11-24" is not used because it could cause complications with Control- Magnetics Interlock if a Magnetic operation were in progress at the time (see the chapter on Magnetics). Within each of the two groups of 2-gates, selection is done by con- nections from the First Source Tree. For example, if the Instruction were “18-24”, the First Source Tree would give signal only on its “O” output line, not on the other seven; the PbD6 signal would be routed first to the group of four 2-gates, since the P8 digit is “1”, and then by the Tree output to Gate 8 to clear the OS. The twelve functions of Destination Triggers are set out below: Instruction Effect 0 – 24 Stim MULT 1 – 24 Stim DIV NS-y-37/11-57

Page 48

These initiate multiplication and division as already partially explained 2 – 24 TIL Discrim When reading or punching, it is often desirable to distinguish the last row on a card from its predecessors; this row is therefore marked by a special signal called TIL (twelfth impulse line) which is issued by the Reader or Punch respectively for a period covering the time when the twelfth row is under the reading brushes or punching knives. To achieve the object of following a different course of action after the twelfth row from that pursued after the others this TIL signal must be connected to D28 which discriminates between zero and non-zero numbers. Since TIL is not wanted for any purpose other than connecting to D28 this connec- tion is made automatically by the Instruction "2-24"; this avoids the necessity of allocating a special Source number to TIL. 3 – 24 Stim TCA 4 - 24 Clear TCB 5 – 24 Stim TCB TCA and TCB are trigger circuits which modify the action of certain Sources and Destinations; they will be described subsequently 6 – 24 Clear ALARUM 7 – 24 Stim ALARUM Many programs incorporate arithmetic checks on their own operation; the failure of such a check is most conveniently indicated by operating the Alarum. This sounds a buzzer and lights a special red lamp on the Control Panel 8 – 24 Clear OS It is necessary to clear the OS between displaying successive words, since otherwise all those lamps would remain lit which had corresponded with a digit “1” in any of the words displayed. 9 – 24 Clear PUNCH and READ 10 – 24 Stim PUNCH 12 – 24 Stim READ NS-y-37/11-57

Page 49

LOGICAL OPERATIONS UNIT

Associated with TS14 and TS15 are four extra Sources, S23 to S26. If one of these Sources is selected, the digits released onto the Highway will represent some special function of the numbers in either one or both of the